Architecture Matters: Design Considerations for SoC FPGAs

Architecture Matters:
Design Considerations
for SoC FPGA
While top-level specifications give you
some highlights of a particular device,
they often don’t provide insight into
the workings of the inner device. How
the elements interact together and
with the rest of your system can
determine success or challenge with
your design. When choosing an SoC,
you should select one that is
architected with your system
requirements in mind.
Embedded processor expert Todd
Koelling examines the key design
considerations for working with SoCs.
Read "Architecture Matters When
Choosing the Right SoC FPGA"
article to explore:
What are the advantages of multiple
memory controllers?
Why does memory protection belong
in the DRAM controller?
What does your parity or error
correction code (ECC) actually cover?
How many masters do you have and
are they all treated equally?
Other SoC information
Building a product with a strong
architecture is key to ensuring that
your system design meets its
performance requirements now and
into the future. With Altera SoCs for
embedded systems, you begin with a
solid foundation that brings your
design:
Improved system performance
through a higher hard processor
system (HPS) to FPGA bandwidth
interconnect, hardware acceleration,
and increased memory performance
Increased reliability through error
correction code (ECC) and memory
protection that help protect systems
against potential hardware or software
errors and warm/cold CPU reset that
initiates without affecting or
reprogramming the FPGA
More flexibility through hardware
differentiation, system boot and
configuration options, and multiple
hardened memory controllers
Lower system cost through single-
chip integration, integrated PCIe®
controller, and no power off
sequencing
Increased productivity through our
FPGA-adaptive debugging tool with
unmatched target visibility, control,
and productivity.
Path for the future through our
roadmap for high-end, mid-range, and
low-end applications, forward
migration of software, and products
with average life cycles of 15 years or
more.
These devices include additional hard
logic such as PCI Express® Gen2,
multiport memory controllers, error
correction code (ECC) , memory
protection and high-speed serial
transceivers. ARM-compatible
software with unmatched target
visibility, control, and productivity
using Altera's exclusive FPGA-
adaptive degugging are also features
that are included.
Silicon devices that integrate CPUs
with programmable logic fabric have
become a major trend in computing
acceleration and embedded
processing. In systems using these
chips, seeming details of the silicon
architecture can actually have a major
influence on the system performance
and ease of design.
Why Altera ?
Altera SoCs integrate an ARM-based
hard processor system (HPS)
consisting of processor, peripherals,
and memory interfaces with the FPGA
fabric using a high-bandwidth
interconnect backbone. It combines
the performance and power savings of
hard intellectual property (IP) with the
flexibility of programmable logic.
Reducing system power, cost, and
board size by integrating discrete
processors and digital signal
processing (DSP) functions into a
single FPGA
Improving system performance via
high-bandwidth interconnect between
the processor and the FPGA
Differentiating your end product by
customizing in both hardware and
software
Developing ARM-compatible software
with unmatched target visibility,
control, and productivity using Altera's
exclusive FPGA-adaptive debugging
Read More at http://www.electronicsforu.com/newelectronics/articles/altera/default.asp